Selective-capacitance constant-charge-injection programming scheme for high-speed multilevel AG-AND flash memories : Low-power, high-speed LSIs and related technologiesOTSUGA, Kazuo; KURATA, Hideaki; NODA, Satoshi et al.IEICE transactions on electronics. 2007, Vol 90, Num 4, pp 772-778, issn 0916-8524, 7 p.Article

Random telegraph signal in flash memory: Its impact on scaling of multilevel flash memory beyond the 90-nm nodeKURATA, Hideaki; OTSUGA, Kazuo; KOTABE, Akira et al.IEEE journal of solid-state circuits. 2007, Vol 42, Num 6, pp 1362-1369, issn 0018-9200, 8 p.Article

A 130-nm CMOS 95-mm² 1-Gb multilevel AG-AND-type flash memory with 10-MB/s programming throughputKURATA, Hideaki; SAEKI, Shunichi; NARUMI, Shunichi et al.IEICE transactions on electronics. 2006, Vol 89, Num 10, pp 1469-1479, issn 0916-8524, 11 p.Article

Constant-charge-injection programming for 10-MB/s multilevel AG-AND flash memoriesKURATA, Hideaki; SAEKI, Shunichi; KOBAYASHI, Takashi et al.2002 symposium on VLSI circuits. 2002, pp 302-303, isbn 0-7803-7310-3, 2 p.Conference Paper

A 126 mm² 4-Gb multilevel AG-AND flash memory with inversion-layer-bit-line technologyKURATA, Hideaki; NODA, Satoshi; SAKAMOTO, Yoshinori et al.IEICE transactions on electronics. 2007, Vol 90, Num 11, pp 2146-2156, issn 0916-8524, 11 p.Article